1. Field of the Invention
The present invention relates to a built-in self-repair (BISR) method and system applied to a memory, and more particularly, to a BISR method and system applied to a NAND flash memory.
2. Description of the Related Art
The flash memory is the most important non-volatile memory on the market, and is characterized by short access time and superior vibration-proof capability. Generally, the flash memory can be of either NOR or NAND type. Although the NOR-type flash memory exhibits a drawback of a longer programming and erasing time, it nonetheless possesses an advantage of random access so that many computer systems need not update frequently. Computer components such as BIOS and firmware are suitable for use with NOR-type flash memories. In contrast, the NAND-type flash memory has the advantages of faster programming and erasing time, longer lifetime and low cost, but only allows consecutive read operations in its I/O ports. Therefore it is primarily used in mobile storage devices, such as personal digital assistants (PDA) and cellular phones.
Generally, commercial flash memories verify their accuracy through probe and tester machines. However, due to an increasing need for system on chip (SOC) and embedded systems, general probes and tester machines face a bottleneck to test such devices. In addition, the yield of a single chip relies primarily on the yield of the flash memory. Therefore it is necessary to design a built-in self-test or self-repair system.
The BISR system for a NOR flash memory primarily includes a built-in self-test (BIST) circuit, a built-in redundancy-analysis (BIRA) circuit and an address replacement module. The BIST circuit uses an algorithm to test for defective data of a flash memory, and provides test data to the BIRA circuit. The BIRA circuit uses the test data and an algorithm to establish a repair strategy. The address replacement module replaces defective data in accordance with the repair strategy using spare storage of the flash memory to complete a self-repair operation.
NAND flash memory reads and writes in a page-unit basis, and erases in a block-unit basis; therefore its BIRA system is different from that of a NOR flash memory and accordingly needs a special design. Traditionally, the BISR system for prior NAND flash memories uses spare columns to repair. However, if defective data are distributed over an entire page, it will cost dozens of spare columns to conduct the repair and is accordingly very inefficient.